1. Field of the Invention
Aspects of the present invention relate to binarization of an input signal, and more particularly, to a binarizing apparatus and method which is capable of correcting an offset of an input signal, a disc driver which includes the binarizing apparatus or performs the binarizing method, and a recording medium thereof.
2. Description of the Related Art
A binary signal called a pit is recorded on the surface of a disc. A radio frequency (RF) signal read by irradiating a laser beam onto the surface of the disc has an analog signal property due to optical frequency characteristics and frequency characteristics of a circuit. An example of a binary signal recorded on a disc, the shape of a pit recorded on the surface of the disc, and the RF signal read from the disc is shown in FIG. 1
Various methods of converting the RF signal to the binary signal have been suggested. As a representative example, a binarizing circuit 200 is shown in FIG. 2. The binarizing circuit 200 shown in FIG. 2 includes a comparator 210 and a low pass filter 220. The comparator 210 compares an input RF signal with a reference level (or slice level) and outputs the result of the comparison as a binary signal of the input RF signal. The reference level is supplied from the low pass filter 220 which low-pass filters the binary signal output from the comparator 210. The low pass filter 220 outputs a DC component of the binary signal output from the comparator 210. The signal output from the low pass filter 220 is supplied as the reference level.
However, as the density of the disc increases, the amplitude of a high frequency signal in the RF signal read from the disc decreases. Thus, a high frequency signal having a level lower than the reference level of the comparator 210 may be generated. For example, as shown in a portion 301 of FIG. 3, an RF signal in which zero-crossing does not properly occur may be generated. FIG. 3 is an example of an RF signal read from a high-density disc having a resolution of higher than a resolution of a system clock. The portion 301 of FIG. 3 shows an RF signal of a pit having a run-length of 2 T or 3 T and a previous pit having a long run-length. The RF signal in which the zero-crossing does not properly occur, as shown in the portion 301 of FIG. 3, corresponds to the high frequency signal having a level lower than the reference level.
When the input RF signal does not reach the reference level, it is impossible to obtain a stable binary signal.
In order to solve this problem, as shown in FIG. 4, a binarizing apparatus 400 to correct an offset of an input signal using a viterbi decoder 402 was suggested. In the binarizing apparatus 400 shown in FIG. 4, a subtractor 401 subtracts a reference level (or a slice level) from an input RF signal in order to obtain an RF signal from which a DC offset is removed.
The viterbi decoder 402 viterbi-decodes the RF signal from which the DC offset is removed so as to obtain a binary signal. A low pass filter 402 low-pass filters the binary signal obtained by the viterbi decoder 402 in order to supply the low-pass filtered binary signal as a reference level. A phase lock loop (PLL) 404 generates a system clock using the RF signal from which the DC offset is removed. The generated system clock is supplied to the viterbi decoder 402. The viterbi decoder 402 decodes the input RF signal in synchronization with the system clock. It is possible to obtain a stable binary signal even when the RF signal read from the high-density disc does not reach the reference level.
However, the binarizing apparatus 400 shown in FIG. 4 cannot reliably remove the DC offset, when the RF signal having a single frequency, as shown in FIG. 5 a through 5C, is input. Although respective input signals having different DC offsets, as shown in FIGS. 5A, 5B and 5C, are input, the viterbi decoder 402 outputs the same value “11110000”. In the case of the input signals shown in FIGS. 5A, 5B and 5C, since the signals input to the low pass filter 403 are the same, the outputs of the low pass filter 403 are the same. Therefore, since the same DC offset is output with respect to the three input signals, the offset is not corrected.